| 参数 | 数值 |
|---|---|
| Intel® Turbo Boost Technology | No |
| VID Voltage Range | 1.050V - 1.150V |
| T JUNCTION | 105°C |
| Supplemental SKU | No |
| Status | Launched |
| Sockets Supported | BGA956 |
| Recommended Customer Price | TRAY: $284 |
| Processor Number | SP9300 |
| Processing Die Size | 107 mm 2 |
| Package Size | 22mm x 22mm |
| Max TDP | 25 W |
| Low Halogen Options Available | See MDDS |
| Lithography | 45 nm |
| Launch Date | Q3'08 |
| L2 Cache | 6 MB |
| Intel® Virtualization Technology (VT-x) | Yes |
| # of Cores | 2 |
| Intel® Trusted Execution Technology | Yes |
| Intel® Hyper-Threading Technology | No |
| Intel® Demand Based Switching | No |
| Intel® 64 | Yes |
| Instruction Set | 64-bit |
| Idle States | No |
| FSB Speed | 1066 MHz |
| FSB Parity | No |
| Execute Disable Bit | Yes |
| Enhanced Intel SpeedStep® Technology | Yes |
| Embedded Options Available | Yes |
| Clock Speed | 2.26 GHz |
| Bus/Core Ratio | 8.5 |
| # of Threads | 2 |
| # of Processing Die Transistors | 410 million |
这些芯片组针对快速部署而优化,提供稍不相同的功能,有些经过英特尔® 酷睿™2 双核处理器 T9400Δ、SL9400Δ 和 SP9300Δ、英特尔® 赛扬® M 处理器 722Δ或英特尔® 赛扬® 处理器 575Δ认证。它们在对温度要求较高的应用程序中提供了各种不同的高性能解决方案。
- 英特尔® 虚拟化技术: 允许硬件平台作为多个虚拟平台。
- 英特尔® 可信执行技术: 防止基于软件的攻击,并帮助保护数据。
- 英特尔® 64 架构: 支持 64 位指令。
交互式结构图

应用注释
| 序号 | 描述 | |
|---|---|---|
| 1 | White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture | White Paper: Programming Models for Packet Processing Applications on Multi-Core Intel® Architecture Systems |
| 2 | White Paper: Designing Systems without a Suspend Supply | White Paper: Designing Systems without a Suspend Supply |
| 3 | White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles | White Paper: Embedded Intel® Architecture and High Speed Digital Design Principles |
| 4 | White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on I | White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on Intel® Architecture |
| 5 | White Paper: Interfacing I²C Devices to Intel's SMBus Controller | White Paper: Interfacing I²C Devices to Intel's SMBus Controller |
| 6 | White Paper: JTAG 101 | White Paper: JTAG 101 |
| 7 | White Paper: PCB Stackup Overview for Intel® Architecture Platforms—Layout and Signal Integrity Cons | White Paper: PCB Stackup Overview for Intel® Architecture Platforms—Layout and Signal Integrity Considerations |
| 8 | White Paper: Platform-Level error Handling Strategies for Intel® Systems | White Paper: Platform-Level error Handling Strategies for Intel® Systems |
| 9 | White Paper: Debugging Machine Check Exceptions on Embedded IA Platforms | White Paper: Debugging Machine Check Exceptions on Embedded IA Platforms |
| 10 | White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts | White Paper: Reducing Interrupt Latency in Embedded Systems through Message Signaled Interrupts |
| 11 | White Paper: Seven Tips to Get Started on Embedded Multi-Core | White Paper: Seven Tips to Get Started on Embedded Multi-Core |
| 12 | White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines | White Paper: Signal Integrity Pitfalls When You Deviate from Intel Design Guidelines |
| 13 | White Paper: Upgrading to Multi-Core Ecosystem Keeps Car Simulator Running in the Fast Lane | White Paper: Upgrading to Multi-Core Ecosystem Keeps Car Simulator Running in the Fast Lane |
| 14 | Application Note: Designing Embedded Systems for Testability | Application Note: Designing Embedded Systems for Testability |
| 15 | Solution Brief: Unwiring the Patient — Using Intel® technologies to create a wireless sensor platfor | Solution Brief: Unwiring the Patient — Using Intel® technologies to create a wireless sensor platform for hospitals |
| 16 | White Paper: Accessing PCI Express* Registers When Using Intel® Chipsets | White Paper: Accessing PCI Express* Registers When Using Intel® Chipsets |
| 17 | White Paper: Asymmetric Multi-Processing, Embedded and Communication MC Usage Model | White Paper: Asymmetric Multi-Processing, Embedded and Communication MC Usage Model |
| 18 | White Paper: Choosing the Right Storage Solution for Your Embedded Application | White Paper: Choosing the Right Storage Solution for Your Embedded Application |
| 19 | White Paper: Considerations for Designing an Embedded IA System with DDR3 SO-DIMMs | White Paper: Considerations for Designing an Embedded IA System with DDR3 SO-DIMMs |
| 20 | White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms | White Paper: DDR Signal Integrity (SI) Simulation Process for Intel® Architecture Platforms |
性能指标评测
| 序号 | 描述 | |
|---|---|---|
| 1 | White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms | White Paper: Hardware Level I/O Benchmarking of PCI Express on Intel® Platforms |
| 2 | White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on I | White Paper: How to Properly Measure Cache Latency, Memory Latency, and CPU to Memory Bandwidth on Intel® Architecture |
| 3 | White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization | White Paper: Layer 3 Forwarding and IPSec Measurement and Optimization |
| 4 | White Paper: Using Intel® Processors for DSP Applications: Comparing the Performance of Freescale MP | White Paper: Using Intel® Processors for DSP Applications: Comparing the Performance of Freescale MPC8641D* and Two Intel® Core™2 Duo Processors |
| 5 | Presentation: Image Signal Processing Performance on 2nd Generation Core™ Microarchitecture | Presentation: Image Signal Processing Performance on 2nd Generation Core™ Microarchitecture |
散热和机械
| 序号 | 描述 | |
|---|---|---|
| 1 | White Paper: Thermal Design Considerations for Embedded Applications | White Paper: Thermal Design Considerations for Embedded Applications |
| 2 | Intel® Core™2 Duo Processors on 45-nm Process Processor for Embedded Applications Thermal Design Gui | Intel® Core™2 Duo Processors on 45-nm Process Processor for Embedded Applications Thermal Design Guide |
| 3 | Power Profiling for Embedded Applications | Power Profiling for Embedded Applications |
产品简介
| 序号 | 描述 | |
|---|---|---|
| 1 | 面向嵌入式计算的45 纳米英特尔® 赛扬®和 | 面向嵌入式计算的45 纳米英特尔® 赛扬®和 |
| 2 | 英特尔® 酷睿™2 双核处理器和移动式英特尔® 4 高速芯片组系列开发套件 高速芯片组系列开发套件 | 英特尔® 酷睿™2 双核处理器和移动式英特尔® 4 高速芯片组系列开发套件 高速芯片组系列开发套件 |
| 3 | 英特尔® 赛扬® M 处理器 575 | 英特尔® 赛扬® M 处理器 575 |
| 4 | 支持嵌入式计算的移动式英特尔® GM45、GS45 和 GL40 高速芯片组 | 支持嵌入式计算的移动式英特尔® GM45、GS45 和 GL40 高速芯片组 |
| 5 | "用于嵌入式计算的英特尔® 酷睿™ 2 双核处理器 T9400、P8400、SL9400、SL9380、SP9300、SU9300、T7500、 T7400、L7500、L7400 和 U7500 处 | "用于嵌入式计算的英特尔® 酷睿™ 2 双核处理器 T9400、P8400、SL9400、SL9380、SP9300、SU9300、T7500、 T7400、L7500、L7400 和 U7500 处理器" |
| 6 | Product Brief: Intel® 82574L and 82574IT Gigabit Ethernet Controllers | Product Brief: Intel® 82574L and 82574IT Gigabit Ethernet Controllers |
以太网控制器
| 序号 | 描述 | |
|---|---|---|
| 1 | Datasheet: Intel® 82574 GbE Controller Family | Datasheet: Intel® 82574 GbE Controller Family |
| 2 | Product Brief: Intel® 82574L and 82574IT Gigabit Ethernet Controllers | Product Brief: Intel® 82574L and 82574IT Gigabit Ethernet Controllers |
| 3 | Specification Update: Intel® 82574 GbE Controller Family | Specification Update: Intel® 82574 GbE Controller Family |
数据表和规格更新
| 序号 | 描述 | |
|---|---|---|
| 1 | Datasheet: Intel® Celeron® Processor 900 Series and Ultra Low Voltage 700 Series | Datasheet: Intel® Celeron® Processor 900 Series and Ultra Low Voltage 700 Series |
| 2 | Datasheet: Intel® I/O Controller Hub 9 (ICH9) Family | Datasheet: Intel® I/O Controller Hub 9 (ICH9) Family |
| 3 | Intel® Core™2 Duo Mobile Processor, Intel® Core™2 Solo Mobile Processor and Mobile Processor, Intel® | Intel® Core™2 Duo Mobile Processor, Intel® Core™2 Solo Mobile Processor and Mobile Processor, Intel® Core™2 Extreme Mobile Processor on 45-nm Process |
| 4 | Mobile Intel® 4 Series Express Chipset Family | Mobile Intel® 4 Series Express Chipset Family |
| 5 | Specification Update: Intel® 4 Series Express Chipset | Specification Update: Intel® 4 Series Express Chipset |
开发主板和套件
| 序号 | 描述 | |
|---|---|---|
| 1 | Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR2 System Memory) Development Ki | Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR2 System Memory) Development Kit User Manual |
| 2 | Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR3 System Memory) Development Ki | Intel® Core™2 Duo Processor and Intel® GM45 Express Chipset (with DDR3 System Memory) Development Kit User Manual |
