| 参数 |
数值 |
| 类型 |
Clock Buffer/Driver, Multiplexer |
| 安装类型 |
Surface Mount |
| 工作温度 |
-40°C ~ 85°C |
| 工作电压 |
2.85 V ~ 3.15 V |
| 频率 - 最大 |
2.7GHz |
| 差分 - 输入:输出 |
Yes/No |
| 比率 - 输入:输出 |
1:1 |
| 电路数 |
1 |
| 输出 |
Clock |
| 输入 |
Clock |
| PLL |
Yes |
| 主要目的 |
RF instrumentation systems, Wireless base stations |
| Package |
20L QFN |
| 系列 |
UltraCMOS? |
| 类别 |
Integrated Circuits (ICs) |
| ФDet Type |
PD |
| Typical Idd(mA @ 3V) |
20 |
| Reference Counters |
6bit |
| Programming Mode |
Serial, EEPROM |
| Prescaler |
10/11 |
| Max Input Operating Freq.-(MHz) Ref. |
100 |
| Max Input Operating Freq.-(MHz) Compare |
20 |
| Max Input Operating Freq.-(GHz) RF PLL |
2.7 |
| Main Counters M, A |
9bit, 4bit |
The PE3342 is a high performance integer-N PLL with embedded EEPROM capable of frequency synthesis up to 2.7 GHz with a speed-grade option to 3.0 GHz. The EEPROM allows designers to permanently store control bits, allowing easy configuration of self-starting synthesizers. The superior phase noise performance of the PE3342 is capable of addressing the needs of applications such as wireless base stations, fixed wireless, and RF instrumentation systems. The PE3342 features a ?10/11 dual modulus prescaler, counters, and a phase comparator. Counter values are programmable through a three-wire serial interface. It is offered in a 20-lead QFN package.
框图

Evaluation Kit Documentation