欢迎光临科通芯城!

科通芯城,IC及其他电子元器件交易型电商平台100%正品保证!

Allegro AMS Simulator

Allegro AMS Simulator

  • 品牌:Cadence
  • 包装:--
  • 无铅情况/ROHS: --
  • 经营商:科通芯城自营
  • 描述:Delivers advanced simulation capabilities for analog/mixed-signal development. Provides design entry feedback, component modeling, stress analysis, and yield projections.
  • 封装:--
  • 类别:PCB设计



Cadence® Allegro® AMS Simulator includes PSpice® technology at the core, providing fast and accurate simulations. This Advanced Analysis package includes utilities for sensitivity analysis, goal-based multi-parameter optimization, component stress and reliability analysis, and Monte Carlo analysis for yield estimation. The parametric plotter analyzes interdependence among parameters and converts simulation data into meaningful results. When combined with , the schematics drawn in AMS Simulator can also drive PCB layout—significantly reducing design time and eliminating redrawing errors. It includes a large library of known models and behavioral modeling techniques that make refining the analog/digital interface a straightforward task.

Features/Benefits
  • Provides fast, accurate analysis of analog and mixed-signal designs
  • Integrates seamlessly with Allegro Design Entry HDL
  • Performs AC, DC, noise, transient, and parameter sweep analyses
  • Includes magnetic parts editor for transformer and inductor design
  • Utilizes a large inventory of accurate internal models with temperature effects
  • Describes functional blocks using editable behavioral models
  • Includes library of more than 20,000 known devices and components
  • Provides automatic circuit optimizer to increase performance
  • Performs circuit sensitivity, component stress, and productive yield analyses
  • Interfaces with MATLAB Simulink for advanced electrical modeling

Conference Paper
序号 PDF 描述
1 32bit MCU Full-Chip Verification using AMS Verification Flow (AMSVF) 32bit MCU Full-Chip Verification using AMS Verification Flow (AMSVF)
2 Detecting and Managing Device Reliability in Block-level and Chip-level Simulations Detecting and Managing Device Reliability in Block-level and Chip-level Simulations
3 Dynamic IR-Drop Analysis with VoltageStorm DG Using Different Power Grid Views for Cell Modeling Dynamic IR-Drop Analysis with VoltageStorm DG Using Different Power Grid Views for Cell Modeling
4 Ensuring Reliable and Optimal Analog PCB Designs with Allegro AMS Simulator Ensuring Reliable and Optimal Analog PCB Designs with Allegro AMS Simulator
5 Full-Chip Verification Flow with Third-Party IP Using AMS Methodology Full-Chip Verification Flow with Third-Party IP Using AMS Methodology
Brochure
序号 PDF 描述
1 Cadence Allegro System Interconnect Design Platform Brochure Cadence Allegro System Interconnect Design Platform Brochure
Datasheet
序号 PDF 描述
1 Cadence Simulation for PCB Design Datasheet Cadence Simulation for PCB Design Datasheet
Application Note
序号 PDF 描述
1 Modeling Analog Circuits with Routed Interconnect using AMS and Allegro SI Modeling Analog Circuits with Routed Interconnect using AMS and Allegro SI
联系我们

联系我们

电话
+86 400 8830 393

传真
+86(755) 2674 4090

电邮
service_info@cogobuy.com

微信
芯云<cogocloud>

快速询价
快速询价
购买指引
购买指引
官方微信

官方微信

官方微信
返回顶部