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Cadence® OrCAD® Signal Explorer is a pre- and post-route signal integrity (SI) analysis and board-level topology exploration environment for simple to complex PCBs. It enables signal exploration, analysis, and validation that helps engineers address SI issues from the very beginning of the design cycle through placement and final routing. In the pre-routing stages, it allows engineers to quickly prototype and assess topology interconnect alternatives in order to improve circuit reliability and performance. In the final stages, OrCAD Signal Explorer provides design verification directly from the OrCAD PCB Editor database. Seamless integration with PCB Editor eliminates database conversion and possible translation issues.

A common database architecture, use model, and library offer SI solutions that are fully scalable to Allegro® PCB SI products, allowing engineers to incorporate more technologies as their designs and design challenges increase in complexity.

Features/Benefits

• Enables pre- and post-layout SI analysis at any stage of the design cycle, ensuring constraint adherence
• Enables the exploration, analysis, and design of interconnect topologies to increase circuit reliability, improve circuit performance, and reduce prototype re-spins
• Easy-to-use model editing environment creates, manipulates, and validates a variety of models, quickly enhancing model/simulation performance