Datasheet
| 序号 | 描述 | |
|---|---|---|
| 1 | Cadence Verification IP for MIPI CSI-3 Datasheet | Cadence Verification IP for MIPI CSI-3 Datasheet |
| 2 | Incisive Verification IP for the USB Protocol Datasheet | Incisive Verification IP for the USB Protocol Datasheet |
| 3 | Incisive Verification IP for the MIPI DigRF v4 Protocol Datasheet | Incisive Verification IP for the MIPI DigRF v4 Protocol Datasheet |
| 4 | Incisive Verification IP for the ARM AMBA Protocol Family Datasheet | Incisive Verification IP for the ARM AMBA Protocol Family Datasheet |
| 5 | Incisive Verification IP for MIPI SLIMbus Protocols Datasheet | Incisive Verification IP for MIPI SLIMbus Protocols Datasheet |
| 6 | Cadence VIP Catalog Datasheet | Cadence VIP Catalog Datasheet |
| 7 | Cadence Verification IP for PCI Express Protocols Datasheet | Cadence Verification IP for PCI Express Protocols Datasheet |
| 8 | Cadence Verification IP for PCI Express Protocols Datasheet | Cadence Verification IP for PCI Express Protocols Datasheet |
| 9 | Cadence Verification IP for MIPI LLI Datasheet | Cadence Verification IP for MIPI LLI Datasheet |
| 10 | Cadence Verification IP for Memories Datasheet | Cadence Verification IP for Memories Datasheet |
| 11 | Cadence Design IP: DDR DRAM Controller Datasheet | Cadence Design IP: DDR DRAM Controller Datasheet |
| 12 | Cadence Design IP: DDR DLL PHY Datasheet for TSMC40LP, TSMC40G, and TSMC28HPM | Cadence Design IP: DDR DLL PHY Datasheet for TSMC40LP, TSMC40G, and TSMC28HPM |
| 13 | Cadence Design IP: DDR DLL PHY Datasheet | Cadence Design IP: DDR DLL PHY Datasheet |
| 14 | Cadence Design IP – PCI Express Gen 3 Controller Datasheet | Cadence Design IP – PCI Express Gen 3 Controller Datasheet |
| 15 | Cadence Design IP – NAND Flash Memory Controller Datasheet | Cadence Design IP – NAND Flash Memory Controller Datasheet |
| 16 | Cadence Design IP – DRAM Memory Controller Datasheet | Cadence Design IP – DRAM Memory Controller Datasheet |
White Paper
| 序号 | 描述 | |
|---|---|---|
| 1 | Power-Aware Verification Spans IC Design Cycle White Paper | Power-Aware Verification Spans IC Design Cycle White Paper |
Article
| 序号 | 描述 | |
|---|---|---|
| 1 | Are You Losing (Out On) Your Memory: Why Memory and Storage Have Reached Their Flashpoint | Are You Losing (Out On) Your Memory: Why Memory and Storage Have Reached Their Flashpoint |
Technical Brief
| 序号 | 描述 | |
|---|---|---|
| 1 | Cadence Design IP: NAND Flash Soft PHY Technical Brief | Cadence Design IP: NAND Flash Soft PHY Technical Brief |
| 2 | Cadence Design IP: NAND Flash Controller Technical Brief | Cadence Design IP: NAND Flash Controller Technical Brief |
