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Integrated with Cadence® Allegro® PCB design, editing, and routing technologies, Allegro PCB SI provides advanced signal integrity (SI) analysis both pre- and post-layout. Operating early in the design cycle allows for “what-if” scenario exploration, sets more accurate design constraints, and reduces design iterations.

Allegro PCB SI reads and writes directly to the Allegro PCB Editor database for fast and accurate integration of results. It provides a SPICE-based simulator and an embedded field solver, and it supports behavioral modeling with a robust modeling language. Bus architecture can be explored pre-layout to compare alternatives, or post-layout for a comprehensive analysis of all associated signals. The Allegro PCB Power Delivery Network (PDN) Analysis Option provides modeling of all power distribution characteristics.

Features/Benefits

• Performs a wide variety of SI analyses
• Reduces design errors to increase first-pass success
• Sets accurate constraints, quickly and early in the process
• Improves product performance through solution-space exploration
• Explores alternative topologies in the earliest stages
• Supports modeling and testing for multi-gigahertz signals
• Generates S-Parameters from signal topologies
• Generates estimated crosstalk tables to increase design efficiency
• Performs post-layout verifications directly from Allegro PCB Editor
• Enables device model creation, modification, and verification
• Verifies multiple-board and silicon-package-board signal paths
• Analyzes power distribution system characteristics