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Cadence® Allegro® Package Designer enables constraint driven substrate interconnect design, extraction, modeling, and signal integrity analysis. The final design output provides automatic system-level handoffs for PCB design.

Features/Benefits

• Supports a full front-to-back physical implementation flow for IC Package design
• Determines the best package and substrate options early in the IC design cycle
• Provides comprehensive design rule- and electrical constraint–driven layout
• Incorporates design for manufacturing (DFM) methodologies
• Improves design flow with intrinsic support for all industry standards
• Models entire design with Cadence 3D Design Viewer